Fujitsu and the University of Toronto today announced joint development of the world’s lowest power referenceless CDR. The newly developed circuit operates with 55% of the power requirements of previous technology for optical modules in Ethernet used for communication between servers and switches in datacenters. With existing referenceless CDRs, the circuit that detects discrepancies in the timing cycle for reading input data has high power consumption, leading to problematic heat generation and causing difficulties in increasing circuit density.
The new timing extraction technology can operate on the same cycle as the data transmission speed, detecting once for each bit discrepancies in the reading cycle from amplitude information in the input signal. The result is that the number of timing generators can be reduced to one-fourth that of previous architectures, successfully cutting power consumed by the optical module as a whole to about 70% that of previous technologies. Details of this technology will be announced at the IEEE International Solid-State Circuits Conference 2017, which is being held in San Francisco.
