Samsung Develops New Highly Efficient Stacking Process for DRAM
Samsung Electronics Co., Ltd., today announced that it has developed the first all-DRAM stacked memory package using ‘through silicon via’ (TSV) technology, which will soon result in memory packages that are faster, smaller and consume less power. The new wafer-level-processed stacked package (WSP) consists of four 512 megabit (Mb) DDR2 (second generation, double data rate) DRAM (dynamic random access memory) chips that offer a combined 2 gigabits (GB) of high density memory. Using the TSV-processed 2Gb DRAMs, Samsung can create a 4 GB (gigabyte) DIMM (dual in-line memory module) based on advanced WSP technology for the first time. Samsung’s proprietary WSP technology not only reduces the overall package size, but also permits the chips to operate faster and use less power. Samsung’s WSP technology forms laser-cut micron-sized holes that penetrate the silicon vertically to connect the memory circuits directly with a copper (Cu) filling, eliminating the need for gaps of extra space and wires protruding beyond the sides of the dies.
These advantages permit Samsung’s WSP to offer a significantly smaller footprint and thinner package. Inside the new WSP, the TSV is housed within an aluminum (Al) pad to escape the performance-slow-down effect caused by the redistribution layer. Samsung’s new stacked package design supports the rapid industry demand for high density, high performance semiconductor solutions that will support next-generation computing systems in 2010 and beyond.