Fujitsu Laboratories and Fujitsu Microelectronics today announced the development of low-power CMOS technology for 32nm-generation logic LSIs, which makes it possible to minimize the number of necessary manufacturing processes for LSIs, and without the need to utilize additional new materials. While minimizing rising costs associated with a rise in additional manufacturing processes, the newly developed technology can reduce power-supply voltage without causing a drop in operation speeds, and can lower operational power consumption by approximately 40% compared to technologies for 45nm-generation logic LSIs.
This new technology can be used for wide range of applications, such as for system LSIs for mobile devices which are becoming increasingly multi-functional, and microprocessors that are increasingly adopting multi-core configurations. Details of this technology will be presented at the 2008 Symposium on VLSI Technology, to be held from June 17 to June 19 in Honolulu, Hawaii.
